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rev. 1.1 september 2010 www.aosmd.com page 1 of 17 AOZ1036 ezbuck? 5a synchron ous buck regulator general description the AOZ1036 is a high efficiency, easy to use, 5a synchronous buck regulator. the AOZ1036 works from 4.5v to 18v input voltage range, and provides up to 5a of continuous output current with an output voltage adjustable down to 0.8v. the AOZ1036 comes in both a 5x4 dfn-8 and an exposed pad so-8 package and is rated over a -40c to +85c ambient temperature range. features z 4.5v to 18v operating input voltage range z synchronous buck: 55m internal high-side switch and 19m internal low-side switch z high efficiency: up to 95% z internal soft start z output voltage adjustable to 0.8v z 5a continuous output current z fixed 500khz pwm operation z cycle-by-cycle current limit z pre-bias start-up z short-circuit protection z thermal shutdown z thermally enhanced 5x4 dfn-8 and exposed pad so-8 packages applications z point of load dc/dc converters z lcd tv z set top boxes z dvd / blu-ray players/recorders z cable modems z pcie graphics cards typical application figure 1. 3.3v 5a synchronous buck regulator lx vin vin vout fb pgnd en comp agnd c2, c3 22f ceramic r1 r2 c c r c c1 22f ceramic l1 4.7h AOZ1036
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 2 of 17 ordering information aos green products use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. pin configuration pin description part number ambient temperature range package environmental AOZ1036di -40c to +85c 5x4 dfn-8 green product AOZ1036pi exposed pad so-8 pin number pin name pin function 5x4 dfn-8 exposed pad so-8 1 1 pgnd power ground. electrically needs to be connected to agnd. 2 2 vin supply voltage input. when vin rises above the uvlo threshold the device starts up. 3 3 agnd reference connection for controll er section. also used as thermal connection for controller section. electrically needs to be connected to pgnd. 4 4 fb the fb pin is used to determine the output voltage via a resistor divider between the output and gnd. 5 5 comp external loop compensation pin. 6 6 en the enable pin is active high. connect it to vin if not used and do not leave it open. 7, 8 pad lx pwm output connection to inductor. 7, 8 nc no connect. pin 7 and 8 are not internally connected. connect these two pins externally to lx and use them for better thermal performance. pgnd vin agnd fb lx lx en comp 5x4 dfn-8 (top view) 1 2 3 4 8 7 6 5 gnd lx 1 2 3 4 pgnd vin agnd fb exposed pad so-8 (top view) pad (lx) nc nc en comp 8 7 6 5
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 3 of 17 block diagram absolute maximum ratings exceeding the absolute maximum ratings may damage the device. note: 1. devices are inherently esd s ensitive, handling precautions are required. human body model rating: 1.5k in series with 100pf. recommended operating conditions the device is not guaranteed to operate beyond the maximum recommended operating conditions. note: 2. the value of ja is measured with the device mounted on 1-in 2 fr-4 board with 2oz. copper, in a still air environment with t a = 25c. the value in any given application depends on the user's specific board design. 500khz oscillator agnd pgnd vin en fb comp lx otp internal +5v ilimit pwm control logic 5v ldo regulator uvlo & por softstart reference & bias 0.8v q1 q2 pwm comp level shifter + fet driver isen eamp 0.2v + ? + ? + ? + ? + short circuit detection comparator parameter rating supply voltage (v in ) 20v lx to agnd -0.7v to v in +0.3v lx to agnd 23v (<50ns) en to agnd -0.3v to v in +0.3v fb to agnd -0.3v to 6v comp to agnd -0.3v to 6v pgnd to agnd -0.3v to +0.3v junction temperature (t j ) +150c storage temperature (t s ) -65c to +150c esd rating (1) 2.0kv parameter rating supply voltage (v in ) 4.5v to 18v output voltage range 0.8v to v in ambient temperature (t a ) -40c to +85c package thermal resistance ( ja ) 5x4 dfn-8 exposed pad so-8 50c/w 50c/w
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 4 of 17 electrical characteristics t a = 25c, v in = v en = 12v, v out = 3.3v unless otherwise specified. specifications in bold indicate a temperature range of -40c to +85c. symbol parameter conditions min. typ. max units v in supply voltage 4.5 18 v v uvlo input under-voltage lockout threshold v in rising v in falling 4.1 3.7 v v i in supply current (quiescent) i out = 0, vfb = 1.2v, v en >1.2v 1.6 2.5 ma i off shutdown supply current v en = 0v 110 a v fb feedback voltage t a = 25c 0.788 0.8 0.812 v load regulation 0.5 % line regulation 1 % i fb feedback voltage input current 200 na v en en input threshold off threshold on threshold 2 0.6 v v v hys en input hysteresis 100 mv modulator f o frequency 400 500 600 khz d max maximum duty cycle 100 % t on_min minimum on time 150 ns error amplifier voltage gain 500 v / v error amplifier transconductance 200 a / v protection i lim current limit 5.8 6.5 a over-temperature shutdown limit t j rising t j falling 150 100 c c t ss soft start interval 3 ms output stage high-side switch on-resistance v in = 12v v in = 5v 55 75 m low-side switch on-resistance v in = 12v v in = 5v 19 23 m
rev. 1.1 september 2010 www.aosmd.com page 5 of 17 AOZ1036 typical performance characteristics circuit of figure 1. t a = 25c, v in = v en = 12v, v out = 3.3v unless otherwise specified. light load operation 2ms/div start up to full load 1ms/div full load (ccm) operation 1 s/div short circuit protection 50 s/div short circuit recovery 1ms/div vin ripple 0.1v/div vo ripple 20mv/div il 1a/div vlx 10v/div vin ripple 0.1v/div vo ripple 20mv/div il 1a/div vlx 10v/div vin 10v/div vo 2v/div lin 1a/div lx 10v/div vo 2v/div il 2a/div lx 10v/div vo 2v/div il 2a/div
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 6 of 17 efficiency efficiency (v in = 12v) vs. load current 40% 50% 60% 70% 80% 90% 100% 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 load current (a) efficiency (%) 5v output 3.3v output 1.8v output 1.2v output efficiency (v in = 5v) vs. load current 40% 50% 60% 70% 80% 90% 100% 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 load current (a) efficiency (%) 3.3v output 1.8v output 1.2v output
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 7 of 17 detailed description the AOZ1036 is a current-mode step down regulator with integrated high-side pm os switch and a low-side nmos switch. it operates from a 4.5v to 18v input voltage range and supplies up to 5a of load current. features include enable control, power-on reset, input under voltage lockout, output over voltage protection, active high power good state, fixed internal soft-start and thermal shut down. the AOZ1036 comes in both a 5x4 dfn-8 and an exposed pad so-8 package. enable and soft start the AOZ1036 has internal soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. a soft start process begins when the input voltage rises to 4.1v and voltage on en pin is high. in soft start process, the output voltage is ramped to regulation voltage in typically 3ms. the 3ms soft start time is set internally. the en pin of the AOZ1036 is active high. connect the en pin to vin if enable function is not used. pull it to ground will disable the AOZ1036 . do not leave it open. the voltage on en pin must be above 2v to enable the AOZ1036. when voltage on en pin falls below 0.6v, the AOZ1036 is disabled. if an app lication circuit requires the AOZ1036 to be disabled, an open drain or open collector circuit should be used to interface to en pin. steady-state operation under steady-state conditions, the converter operates in fixed frequency and continuous-conduction mode (ccm). the AOZ1036 integrates an internal p-mosfet as the high-side switch. inductor current is sensed by amplifying the voltage drop across the drain to source of the high side power mosfet. output voltage is divided down by the external voltage divider at the fb pin. the difference of the fb pin voltage and reference is amplified by the internal transconductance error amplifier. the error voltage, which shows on the comp pin, is compared against the current signal, which is sum of inductor current signal and ramp compensation signal, at pwm comparator input. if the current signal is less than the error voltage, the internal high-side switch is on. the inductor current flows from the input through the inductor to the output. when the current signal exceeds the error voltage, the high-side switch is off. the inductor current is freewheeling through the inte rnal low-side n-mosfet switch to output. the internal adaptive fet driver guarantees no turn on overlap of both high-side and low-side switch. comparing with regulators using freewheeling schottky diodes, the AOZ1036 uses freewheeling nmosfet to realize synchronous rectification. it greatly improves the converter efficiency and reduces power loss in the low-side switch. the AOZ1036 uses a p-channel mosfet as the high-side switch. it saves the bootstrap capacitor normally seen in a circuit which is using an nmos switch. switching frequency the AOZ1036 switching frequency is fixed and set by an internal oscillator. the pr actical switching frequency could range from 400khz to 600khz due to device variation. light load mode the AOZ1036 includes is a pulse-skip architecture for light load operation, enabling increased efficiency during standby. under heavy loads, the controller operates in a standard synchronous mode using the high-side pmos as control fet and low-side nmos as synchronous rectifier nmos. during light loads, the controller automatically switches to a non-synchronous mode using the high-side pmos as control fet and the integrated diode as freewheeling rectifier diode. output voltage programming output voltage can be set by feeding back the output to the fb pin by using a resistor divider network. in the application circuit shown in figure 1. the resistor divider network includes r 1 and r 2 . usually, a design is started by picking a fixed r 2 value and calculating the required r1 with equation below. some standard value of r 1 , r 2 and most used output voltage values are listed in table 1 on the next page. v o 0.8 1 r 1 r 2 ------ - + ?? ?? ?? =
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 8 of 17 table 1. the combination of r1 and r2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. protection features the AOZ1036 has multiple protection features to prevent system circuit damage under abnormal conditions. over current protection (ocp) the sensed inductor current si gnal is also used for over current protection. since the AOZ1036 employs peak current mode control, the comp pin voltage is proportional to the peak inductor current. the comp pin voltage is limited to be between 0.4v and 2.5v internally. the peak inductor current is automatically limited cycle by cycle. when the output is shorted to ground under fault conditions, the inductor current decays very slow during a switching cycle because of v o = 0v. to prevent catastrophic failure, a secondary current limit is designed inside the AOZ1036. the measured inductor current is compared against a preset voltage which represents the current limit, between 3.5a and 5.0a. when the output current is more than current lim it, the high side switch will be turned off. the converter will initiate a soft start once the over-current condition disappears. power-on reset (por) a power-on reset circuit monitors the input voltage. when the input voltage exceeds 4.1v, the converter starts operation. when input voltage falls below 3.7v, the converter will be shut down. thermal protection an internal temperature sensor monitors the junction temperature. it shuts down the internal control circuit and high side pmos if the junction temperature exceeds 150oc. the regulator will rest art automatically under the control of soft-start circuit when the junction temperature decreases to 100oc. application information the basic AOZ1036 application circuit is show in figure 1. component selection is explained below. input capacitor the input capacitor must be connected to the v in pin and pgnd pin of AOZ1036 to maintain steady input voltage and filter out the pulsing input current. the voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage. the input ripple voltage can be approximated by the equation below: since the input current is discontinuous in a buck con- verter, the current stress on the input capacitor is another concern when selecting the capacitor. for a buck circuit, the rms value of input capacitor current can be calculated by: if we let m equal the conversion ratio: the relation between the input capacitor rms current and voltage conversion ratio is calculated and shown in figure 2 on the next page. it can be seen that when v o is half of v in , c in is under the worst current stress. the worst current stress on c in is 0.5 x i o . vo (v) r1 (k ) r2 (k ) 0.8 1.0 open 1.2 4.99 10 1.5 10 11.5 1.8 12.7 10.2 2.5 21.5 10 3.3 31.1 10 5.0 52.3 10 v in i o fc in ----------------- 1 v o v in -------- - ? ?? ?? ?? v o v in -------- - = i cin_rms i o v o v in -------- - 1 v o v in -------- - ? ?? ?? ?? = v o v in -------- - m =
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 9 of 17 figure 2. i cin vs. voltage conversion ratio for reliable operation and best performance, the input capacitors must have current rating higher than i cin_rms at worst operating conditions. ceramic capacitors are preferred for input capacitors because of their low esr and high current rating. depending on the application circuits, other low esr tantalum capacitor may also be used. when selecting cerami c capacitors, x5r or x7r type dielectric ceramic capacitors should be used for their better temperature and voltage characteristics. note that the ripple current rating from capacitor manufactures are based on certain amount of life time. further de- rating may be necessary in practical design. inductor the inductor is used to supply constant current to output when it is driven by a swit ching voltage. for given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: the peak inductor current is: high inductance gives low inductor ripple current but requires larger size inductor to avoid saturation. low ripple current reduces inductor core losses. it also reduces rms current through inductor and switches, which results in less conduc tion loss. usually, peak to peak ripple current on inductor is designed to be 20% to 30% of output current. when selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. the inductor takes the highest current in a buck circuit. the conduction loss on inductor need to be checked for thermal and efficiency requirements. surface mount inductors in different shape and styles are available from coilcraft, elytone and murata. shielded inductors are small and radiate less emi noise. but they cost more than unshielded inductors. the choice depends on emi requirement, price and size. output capacitor the output capacitor is select ed based on the dc output voltage rating, output ripple voltage specification and ripple current rating. the selected output capacito r must have a higher rated voltage specification than the maximum desired output voltage including ripple. de-rating needs to be considered for long term reliability. output ripple voltage specif ication is another important factor for selecting the output capacitor. in a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and esr. it can be calculated by the equation below: where; c o is output capacitor value, and esr co is the equivalent series resistor of output capacitor. when low esr ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. output ripple is mainly caused by capacitor value and inductor ripple current. the output ripple voltage calculation can be simplified to: if the impedance of esr at switching frequency dominates, the output ripple voltage is mainly decided by capacitor esr and inductor ripple current. the output ripple voltage calculation can be further simplified to: for lower output ripple voltage across the entire operating temperature range, x5r or x7r dielectric type of ceramic, or other low esr tantalum are recommended to be used as output capacitors. 0 0.1 0.2 0.3 0.4 0.5 0 0.5 1 m i cin_rms (m) i o i l v o fl ---------- - 1 v o v in -------- - ? ?? ?? ?? = i lpeak i o i l 2 -------- + = v o i l esr co 1 8 fc o ------------------------- + ?? ?? = v o i l 1 8 fc o ------------------------- = v o i l esr co =
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 10 of 17 in a buck converter, out put capacitor current is continuous. the rms current of output capacitor is decided by the peak to peak inductor ripple current. it can be calculated by: usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. when the buck inductor is selected to be very small and inductor ripple current is high, output capacitor could be overstressed. external schottky diode for high input operation when v in is higher than 16v, an external 1a schottky diode is required between lx and pgnd for proper operation. loop compensation the AOZ1036 employs peak current mode control for easy use and fast transient response. peak current mode control eliminates the doubl e pole effect of the output l&c filter. it greatly simp lifies the compensation loop design. with peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in frequency domain. the pole is dominant pole can be calculated by: the zero is a esr zero due to output capacitor and its esr. it is can be calculated by: where; c o is the output filter capacitor, r l is load resistor value, and esr co is the equivalent series resistance of output capacitor. the compensation design is actually to shape the converter control loop transfer function to get desired gain and phase. several different types of compensation network can be used for the AOZ1036. for most cases, a series capacitor and resistor network connected to the comp pin sets the pole-zero and is adequate for a stable high-bandwidth control loop. in the AOZ1036, fb pin and comp pin are the inverting input and the output of internal error amplifier. a series r and c compensation network connected to comp provides one pole and one zero. the pole is: where; g ea is the error amplifier transconductance, which is 200 x 10 -6 a/v, g vea is the error amplifier voltage gain, which is 500 v/v, and c c is compensation ca pacitor in figure 1. the zero given by the external compensation network, capacitor c c and resistor r c , is located at: to design the compensation circuit, a target crossover frequency f c for close loop must be selected. the system crossover frequency is where control loop has unity gain. the crossover is the also called the converter bandwidth. generally a higher bandwidth means faster response to load transient. however, the bandwidth should not be too high because of system stability concern. when designing the comp ensation loop, converter stability under all line and load condition must be considered. usually, it is recommended to set the bandwidth to be equal or less than 1/10 of switching frequency. the AOZ1036 operates at a frequency range from 400khz to 600khz. it is recommended to choose a crossover frequency equal or less than 40khz. the strategy for choosing r c and c c is to set the cross over frequency with rc and set the compensator zero with c c . using selected crossover frequency, f c , to calculate r c : where; f c is desired crossover frequency. for best performance, f c is set to be about 1/10 of switching frequency, v fb is 0.8v, g ea is the error amplifier transconductance, which is 200 x 10 -6 a/v, and g cs is the current sense circuit transconductance, which is 6.68 a/v. i co_rms i l 12 ---------- = f p 1 1 2 c o r l ---------------------------------- - = f z 1 1 2 c o esr co ------------------------------------------------ = f p 2 g ea 2 c c g vea ------------------------------------------ - = f z 2 1 2 c c r c ----------------------------------- = f c 40 khz = r c f c v o v fb ---------- 2 c c g ea g cs ----------------------------- - =
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 11 of 17 the compensation capacitor c c and resistor r c together make a zero. this zero is put somewhere close to the dominate pole f p1 but lower than 1/5 of selected crossover frequency. c c can is selected by: the equation above can also be simplified to: an easy-to-use application software which helps to design and simulate the compensation loop can be found at www.aosmd.com . thermal management and layout consideration in the AOZ1036 buck regulator circuit, high pulsing current flows through two circuit loops. the first loop starts from the input capacito rs, to the vin pin, to the lx pin, to the filter inducto r, to the output capacitor and load, and then return to the input capacitor through ground. current flows in the first loop when the high side switch is on. the second loop starts from inductor, to the output capacitors and load, to the low side nmosfet. current flows in the second loop when the low side nmosfet is on. in pcb layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. a ground plane is strongly recommended to connect input capacitor, output capacitor, and pgnd pin of the AOZ1036. in the AOZ1036 buck regulator circuit, the major power dissipating components are the AOZ1036 and the output inductor. the total power dissipation of converter circuit can be measured by input power minus output power. the power dissipation of inductor can be approximately calculated by output curr ent and dcr of inductor. the actual junction temperature can be calculated with power dissipation in the AOZ1036 and thermal impedance from junction to ambient. the maximum junction tem perature of AOZ1036 is 150oc, which limits the maxi mum load current capability. please see the thermal de-rating curves for maximum load current of the AOZ1036 under different ambient temperature. the thermal performance of the AOZ1036 is strongly affected by the pcb layout. extra care should be taken by users during design process to ensure that the ic will operate under the recommended environmental conditions. several layout tips are listed below for the best electric and thermal performance. 1. the lx pins are connected to internal pfet and nfet drains. they are low resistance thermal conduction path and most noisy switching node. connected a large copper plane to lx pin to help thermal dissipation. 2. do not use thermal relief connection to the vin and the pgnd pin. pour a maximized copper area to the pgnd pin and the vin pin to help thermal dissipation. 3. input capacitor should be connected to the vin pin and the pgnd pin as close as possible. 4. a ground plane is preferred. if a ground plane is not used, separate pgnd from agnd and connect them only at one point to avoid the pgnd pin noise coupling to the agnd pin. 5. make the current trace from lx pins to l to co to the pgnd as short as possible. 6. pour copper plane on all unused board area and connect it to stable dc nodes, like vin, gnd or vout. 7. keep sensitive signal trace far away from the lx pins. c c 1.5 2 r c f p 1 ----------------------------------- = c c c o r l r c --------------------- = p total_loss v in i in v o i o ? = p inductor_loss i o 2 r inductor 1.1 = t junction p total_loss p inductor_loss ? () ja =
rev. 1.1 september 2010 www.aosmd.com page 12 of 17 AOZ1036 package dimensions, 5x4 dfn-8 d index area (d/2 x e/2) l r 1 e2 e3 l1 d2 d3 aaa c ccc c ddd c bbb aaa c d/2 e/2 a3 b a1 unit: mm a a e b e c cab seating plane pin #1 ida notes: 1. dimensions and tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. 3. the location of the terminal #1 identifier and terminal numbering convention conforms to jedec publication 95 sp-002. 4. dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. if the terminal has the optional radius on the other end of the terminal, the dimension b should not be measured in that radius area. 5. coplanarity applies to the terminals and all other bottom surface metallization. 6. drawing shown are for illustration only. symbols a a1 a3 b d d2 d3 e e2 e3 e l l1 r aaa bbb ccc ddd dimensions in millimeters recommended land pattern side view top view bottom view min. 0.80 0.00 0.35 1.975 1.625 2.500 2.050 0.600 0.400 C C C C nom. 0.90 0.02 0.20 ref 0.40 5.00 bsc 2.125 1.775 4.00 bsc 2.650 2.200 0.95 bsc 0.700 0.500 0.30 ref 0.15 0.10 0.10 0.08 max. 1.00 0.05 0.45 2.225 1.875 2.750 2.300 0.800 0.600 C C C C symbols a a1 a3 b d d2 d3 e e2 e3 e l l1 r aaa bbb ccc ddd dimensions in inches min. 0.031 0.000 0.014 0.078 0.064 0.098 0.081 0.024 0.016 C C C C nom. 0.035 0.001 0.008 ref 0.016 0.197 bsc 0.084 0.070 0.157 bsc 0.104 0.087 0.037 bsc 0.028 0.020 0.012 ref 0.006 0.004 0.004 0.003 max. 0.039 0.002 0.018 0.088 0.074 0.108 0.091 0.031 0.024 C C C C
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 13 of 17 tape dimensions, 5x4 dfn-8 r0 .40 p0 k0 a0 e e2 d0 e1 d1 b0 package dfn 5x4 (12 mm) a0 b0 k0 e e1 e2 d0 d1 p0 p1 p2 t 5.30 0.10 0.10 4.30 0.10 1.20 min. 1.50 1.50 12.00 0.10 1.75 0.10 5.50 0.10 8.00 0.20 4.00 0.10 2.00 0.05 0.30 unit: mm t typ. 0.20 feeding direction tape leader/trailer and orientation 0.30 +0.10 / C0 trailer tape 300mm min. components tape orientation in pocket leader tape 500mm min.
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 14 of 17 reel dimensions, 5x4 dfn-8 reel view: c c 0.05 3-1.8 ?96 0.2 6.45 0.05 3-?2. 9 0.05 3-? 1 / 8 " 3- ?1 / 4" 8.9 0.1 11.90 14 ref 1.8 5.0 12 ref 41.5 ref 43.00 44.5 0.1 2.00 6.50 10.0 10.71 10 3-?3/1 6 " r48 ref ?86.0 0.1 2.20 6.2 ?13.00 ?21.20 ?17 .0 r 1 . 10 r 3 .10 2.00 3.3 4.0 6.10 0.80 3.00 8.00 +0.05 0.00 r 0. 5 1.80 2.5 3 8 44.5 0.1 46.0 0.1 8.0 0.1 40 6 3-?3/16" r 3 .95 6.50 ?90. 0 0 6.0 1.8 1 .8 r1 8.00 0.00 -0.05 n=?100 2 a a a r121 r127 r1 59 r6 r5 5 p b w1 m ii i i 6.0 1 r1 zoom in iii zoom in ii zoom in a tape size 12mm reel size ?330 m ?330 +0.3 -4.0 w1 12.40 +2.0 -0.0 b 2.40 0.3 p 0.5
rev. 1.1 september 2010 www.aosmd.com page 15 of 17 AOZ1036 package dimensions, exposed pad so-8 notes: 1. package body sizes exclude mold flash and gate burrs. 2. dimension l is measured in gauge plane. 3. tolerance 0.10mm unless otherwise specified. 4. controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 5. die pad exposure size is according to lead frame design. 6. followed from jedec ms-012 symbols a a1 a2 b c d d0 d1 e e e1 e2 e3 l y | l1Cl1' | l1 dimensions in millimeters recommended land pattern min. 1.40 0.00 1.40 0.31 0.17 4.80 3.20 3.10 5.80 3.80 2.21 0.40 0 d0 unit: mm nom. 1.55 0.05 1.50 0.406 4.96 3.40 3.30 6.00 1.27 3.90 2.41 0.40 ref 0.95 3 0.04 1.04 ref max. 1.70 0.10 1.60 0.51 0.25 5.00 3.60 3.50 6.20 4.00 2.61 1.27 0.10 8 0.12 dimensions in inches d1 e1 e e3 e2 note 5 l1' l1 l gauge plane 0.2500 c d 7 (4x) b 3.70 2.20 2.87 2.71 5.74 1.27 0.80 0.635 e a1 a2 a symbols a a1 a2 b c d d0 d1 e e e1 e2 e3 l y | l1Cl1' | l1 min. 0.055 0.000 0.055 0.012 0.007 0.189 0.126 0.122 0.228 0.150 0.087 0.016 0 nom. 0.061 0.002 0.059 0.016 0.195 0.134 0.130 0.236 0.050 0.153 0.095 0.016 ref 0.037 3 0.002 0.041 ref max. 0.067 0.004 0.063 0.020 0.010 0.197 0.142 0.138 0.244 0.157 0.103 0.050 0.004 8 0.005
AOZ1036 rev. 1.1 september 2010 www.aosmd.com page 16 of 17 tape and reel dimens ions, exposed pad so-8 carrier tape reel tape size 12mm reel size ?330 m ?330.00 0.50 package so-8 (12mm) a0 6.40 0.10 b0 5.20 0.10 k0 2.10 0.10 d0 1.60 0.10 d1 1.50 0.10 e 12.00 0.10 e1 1.75 0.10 e2 5.50 0.10 p0 8.00 0.10 p1 4.00 0.10 p2 2.00 0.10 t 0.25 0.10 n ?97.00 0.10 k0 unit: mm b0 g m w1 s k h n w v r trailer tape 300mm min. or 75 empty pockets components tape orientation in pocket leader tape 500mm min. or 125 empty pockets a0 p1 p2 feeding direction p0 e2 e1 e d0 t d1 w 13.00 0.30 w1 17.40 1.00 h ?13.00 +0.50/-0.20 k 10.60 s 2.00 0.50 g r v leader/trailer and orientation unit: mm
rev. 1.1 september 2010 www.aosmd.com page 17 of 17 AOZ1036 part marking z1036di fay part number code assembly lot code year & week code wlt fab & assembly location z1036pi fay part number code assembly lot code year & week code wlt fab & assembly location 5x4 dfn-8 exposed pad so-8 as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provid ed in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. this datasheet contains preliminary data; supplementary data may be published at a later date. alpha & omega semiconductor reserves the right to make changes at any time without notice. life support policy alpha & omega semiconductor products ar e not authorized for use as critical components in life supp ort devices or systems.

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